The present invention relates to phase-locked loop systems and more specifically to apparatus for detecting phase errors and generating a phase error correction voltage.
There is a continual need for circuit arrangements which provide a second signal in accurately timed relation with a first signal. Phase-locked loops are commonly used to accomplish this end. In a phase-locked loop, the two signals are applied to a phase detector, the output of which is a function of the phase difference between the two signals applied. An error voltage is developed which, after low-pass filtering in a loop filter, is applied to the control input of a voltage controlled oscillator in such a way that the oscillator signal phase must follow the input signal phase. In most second-order phase-locked loops, an error amplifier has to be fitted between the phase detector and the voltage-controlled oscillator.
Those desiring detailed information on the subject of phase-locked loop circuits are referred to Chapter 6 of the text Frequency Synthesis by V. F. Kroupa, Copyright 1973, Charles Griffin & Company Limited.